1 Introduction
With the rapid development of information technology, more and more places require the identification of users and the safe storage of important data. The smart card, also known as an integrated circuit card (IC card), is a data bearing device with high reliability, security, and flexibility. It is now widely used in government, finance, telecommunications, transportation, and public use. Business and other fields.
The smart card controller is a bridge connecting the smart card and the master control device. Since the application of the smart card is increasing, more and more SOC chips are embedded with a smart card controller IP core. This design method based on IP core has become the mainstream of IC design. Here mainly introduces the digital logic implementation method of smart card controller IP core and its application in hard disk encryption chip.
2. Introduction to the agreement
Here is a brief description of the contents of some of the agreements to be used in this article. Please refer to Reference 1 for the details of the agreement.
There are eight contacts in the smart card, among which are six contacts for C1, C2, C3, C5, C6, and C7. See the following table for details:
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Table 1: Smart Card Contacts
The smart card controller performs half-duplex serial communication with the controller through the smart card contact C7 (I/O). At each moment, the contact C7 has only two states of the state Z and the state A.
The time width of the 11 bits that the smart card is to transmit one byte (8 bits) of data is denoted by t1 to t11 in the following table. The Start bit transmitted at the first time t1 is called the start bit; the second to ninth time, ie, the time t2 to the time t9, the transmitted data ba to bh are eight bits of one byte; the time t10 is transmitted The pi bit is a parity bit; the Stop bit transmitted at the last time t11 is called a stop bit, indicating that the data transfer for one byte (8 Bits) is complete. Please see the following table:
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Table 2: Smart Card Serial Transmission Data Format
3, micro-architecture
3.1, interface signal
The IP core interface is mainly divided into CPU bus interface, interrupt signal and smart card control interface. Here mainly introduces the interface signals related to smart card control, that is, the signals that connect or control the effective contacts on the smart card. They are:
1) Whether the smart card has a signal IC_PRES: It is used to detect whether there is a smart card on the smart card. When a smart card is inserted or removed, the level of the signal is changed and the IP core can detect the change of the signal level. And report it to the CPU in the form of interrupts;
2) Smart card power control signal IC_PWR: used to control the smart card's power supply VCC or VPP (contact C1 or C6), used to turn the smart card power on and off;
3) Clock signal IC_CLK: connected with the smart card contact C3, used to input a certain frequency clock signal to the smart card;
4) Reset signal IC_RST: connected with the smart card contact C2, used to send a reset signal to the smart card;
5) Bidirectional serial data signal IC_IO: Connected with the smart card contact C7 for bidirectional data communication with the smart card.
3.2, modules and functions
The smart card controller core has a Transmitter and Receiver, an Interrupt Arbitrator, a Function Generator, a Clock Generator, an Interface Device and an Access Register Module. Register Access Control) six modules, the relationship between these modules shown in Figure 1:
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Figure 1 Structure of the ISO7816 smart card controller module
The main module functions and features are described as follows:
1). The sending and receiving modules The sending and receiving modules are responsible for handling the sending and receiving of data frames. The sending module converts the parallel data into a serial data frame according to the set format of the data in the FIFO transmission queue, and sends it out through the sending port. The receiving module monitors the signal received by the receiver. Once a valid start bit occurs, the receiver receives the data and converts the received asynchronous serial data frame into parallel data and stores it in the FIFO receive queue. At the same time, it checks whether the data frame format is wrong. The frame structure of the smart card controller is set by the LCR (Line Control Reg) register. The status of the receiver and transmitter is stored in the Line Status Reg (LSR) register.
2). Interrupt Arbitration Module When any interrupt condition is satisfied and the corresponding bit in the interrupt enable register (IER, Interrupt Enable Reg) is set, the smart card interrupt request signal INT is asserted. In order to reduce interaction with external software, the smart card controller divides the interrupts into four levels and identifies these interrupts in the Interrupt ID Reg (IIR). The four levels of interrupts are ranked in order of priority from highest to lowest: smart card swapping interrupts, receive line status interrupts, receive data ready interrupts, and transfer own registers are empty interrupts.
3). Function module This module generates the relevant timing of the smart card. Detecting smart cards, managing power supply, and generating reset timings by entering relevant parameters into the corresponding registers of function registers (FRs).
4). Clock Module The clock module generates the clock with the corresponding frequency to the smart card. The frequency of the clock is determined by the clock frequency of the CPU bus and the value of the Write Clock Divider Register (CDR). The relational expression is as follows:
fIC_CLK = fCPU / (2 * CDR)
5). Smart Card Interface Module This module makes appropriate adjustments to the relevant signals to suit the communication of the IC smart card.
6). Access register module When the smart card controller is selected by the bus controller, the CPU can access the register selected by the address line through a read or write operation.
4, design and implementation
This part will briefly explain the digital logic implementation methods of the main modules of the smart card controller one by one.